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JEDEC Updates HBM Normal With Up To 24 GB Reminiscence & 307 GB/s Bandwidth Assist Per Stack

JEDEC has revealed an replace for the high-bandwidth reminiscence commonplace which permits larger capacities and sooner pin speeds. With the replace, system producers adopting HBM can leverage from larger reminiscence capacities and varied machine configurations as HBM reminiscence serves a number of purposes embrace Graphics, Excessive-Efficiency Computing, Server, Networking and Shopper purposes.

JEDEC Printed New Replace For Excessive-Bandwidth Reminiscence Normal – Greater Reminiscence Capacities of Up To 24 GB, Quicker Pin Speeds

The present HBM2 reminiscence permits for as much as Eight GB reminiscence in 4-Hello or 8-Hello stacks. The merchandise that take advantage of use of the HBM2 commonplace presently within the graphics trade are the Tesla V100 that’s produced by NVIDIA and the upcoming Intuition MI60 from AMD. Each playing cards would function 32 GB of HBM2 reminiscence and have a Terabyte of bandwidth (900 GB/s for the Tesla V100). The important thing right here is that these playing cards make use of Four HBM2 stacks, every with Eight GB of reminiscence per stack. These will be both 4-Hello or 8-Hello, relying on the reminiscence configuration (Tesla V100 can also be accessible in 16 GB HBM2 variant).

screen-shot-2018-06-27-at-2-29-58-pmAssociated Samsung Can Double Their HBM2 Manufacturing Capability However Provide Points Would Nonetheless Persist as Demand Exceeds Manufacturing

JEDEC commonplace JESD235B for HBM leverages Broad I/O and TSV applied sciences to help densities as much as 24 GB per machine at speeds as much as 307 GB/s. This bandwidth is delivered throughout a 1024-bit extensive machine interface that’s divided into Eight impartial channels on every DRAM stack.  The usual can help 2-high, 4-high, 8-high, and 12-high TSV stacks of DRAM at full bandwidth to permit techniques flexibility on capability necessities from 1 GB – 24 GB per stack.

This replace extends the per pin bandwidth to 2.Four Gbps, provides a brand new footprint choice to accommodate the 16 Gb-layer and 12-high configurations for larger density parts, and updates the MISR polynomial choices for these new configurations.  Further clarifications are offered all through the doc to handle take a look at options and compatibility throughout generations of HBM parts.

by way of JEDEC

With the up to date JEDEC commonplace, HBM will likely be up to date to help 24 GB of reminiscence per stack. The reminiscence could be made up of 16 Gb dies and might scale all the way in which from 1 GB to 24 GB per stack relying on the peak of the stacks themselves. The usual can help 2-Hello, 4-Hello, 8-Hello and 12-Hello TSV stacks and every would function a 1024-bit extensive bus interface.

A single stack thus will provide speeds of 307 GB/s. When you have a look at the topmost configuration that one can get out of the brand new commonplace, you get 96 GB of reminiscence and 1.2 TB/s bandwidth alongside a 4096-bit extensive interface. That is an unprecedented quantity of reminiscence and bandwidth you will get from a single chip however clearly, it could value loads.


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